In conventional integrated circuit technology, one of the requirements of a high performance bipolar CMOS integrated circuit structure is to provide a contact to a heavily doped buried layer in a silicon substrate. Typically this is achieved by a high dose, high energy ion implantation into the substrate surface, followed by diffusion, i.e. annealing at an elevated temperature, for a time sufficient to allow the implanted dopant to reach the buried layer.
For example, a typical known structure for a bipolar transistor formed in an epitaxial surface layer of a semiconductor, comprises a heavily doped buried layer of semiconductor material which forms a buried collector electrode, and a contact to the buried layer, commonly called a sinker, is provided in a sinker region adjacent to a device well region in which are defined base and emitter structures of the transistor. The sinker region is isolated from the surrounding surface regions by part of a field oxide layer. A conventional sinker is formed after forming device wells and field isolation regions. The sinker region is patterned, i.e. by masking with photoresist so that only the sinker regions are exposed, and then the sinker is formed by ion implantation and diffusion sufficiently deep into the substrate that the implanted diffused layer reaches the buried layer, and thus forms a conductive contact with the buried layer. Thus a long and/or high temperature anneal is required to diffuse the sinker implant to reach a deep buried layer. The large thermal budget may cause unwanted diffusion in other layers, and is not desirable in a scaled back process. The requirement for deep diffusion may introduce process bias to the lateral dimensions of the sinker structure, i.e. causes lateral diffusion of the implanted sinker, which substantially increases the area of the sinker, and thus increases the minimum sinker to base separation required. Also, the resulting collector-substrate and collector-base capacitances, and collector resistance may be higher than desirable for reduced dimension devices.